Memory caches are storage systems incorporated into data processing systems for performance reasons. A memory cache stores a subset of the contents of the data processing system's main memory for use by a selected subsystem, typically the system's data processor. A memory cache can supply data to the data processor faster than the main memory can because of several reasons. First, the memory cache is often made of higher grade memory circuits than is the main memory system. These circuits can simply operate at a higher clock rate than can the main memory. Also, there may be a dedicated bus between the data processor and the memory cache that results in higher bandwidth between the data processor and the memory cache than between the data processor and the main memory. Finally, a memory cache may be physically located on the same integrated circuit as the subsystem to which it provides data. In this case, the memory cache is constructed from faster circuits and there is a dedicated bus between the memory cache and the data processor.
Memory caches may be further differentiated by the type of information which they store. A unified cache stores all types of information in a single structure. An instruction cache only stores instructions that are executed or are to be executed by the data processor. A data cache only stores data that is used or is to be used by the data processor. Data processing systems incorporating an instruction cache and a data cache are referred to as having a "Harvard architecture."
Data processors having a Harvard architecture have at least one disadvantage. These data processors lack the ability to load particular instructions into their instruction caches as they load particular blocks of data into their data caches. Instead, a data processor having a Harvard architecture loads instructions into its instruction cache as a by-product of determining which instruction it should execute next. The data processor loads each of these instructions into its instruction cache immediately before it executes a particular instruction. Consequently, a small delay may be introduced before each instruction or group of instructions is executed while the data processor fetches the instruction from the data processing system's main memory subsystem.